You write custom CUDA kernels to replace PyTorch operators for speedups.
Implement Spatial-Diff Sigmoid Gate on NCHW tensors: For each element x[n,c,h,w], compute d = x[n,c,h,w] - x[n,c,h,w-1] (use 0 for w=0), gate g = sigmoid(alpha*d + beta), and output y = x * g. Use a single grid-stride kernel over all elements that reads the left neighbor efficiently and applies gating in-place to the output. Provide a PyTorch reference using nn.Parameter alpha and beta. Accuracy within rtol=1e-3.
